Semiconductor devices comprising power field effect transistors use metal wires to interconnect the respective elements such as source and drain, in particular if the power MOSFET consists of a plurality of transistor cells that are coupled in parallel on the semiconductor die to form a single power MOSFET. Such a metal layer cannot be deposited directly on a surface of a semiconductor die as it would contaminate the underlying semiconductor layers and possibly render the device inoperable. In conventional devices, the metal wires consist for example of aluminum. However, other materials such as copper may be used. Generally, films of aluminum are deposited first over a dielectric layer covering the top of the semiconductor wafer, patterned, and then etched, leaving isolated wires 610 as shown in FIGS. 6-8. These wires 610 contact the respective active areas (drain, source, gates) through holes, called vias 630, that have been previously etched in the insulating material wherein tungsten is deposited in the vias for example by means of a chemical vapor deposition CVD technique. Another layer of dielectric material is then deposited over the exposed wires. The first metal layer with its various wires 610 is then interconnected by a second metal layer 620 by means of further vias 640 etched in the top insulating material. This method can be continued to create an even distribution of the metal wire resistance, and increasing metal wire widths allowing for a large enough metal wire size to be connected to a lead frame for assembly into a final packaged part. Generally at least three metal layers are used for interconnecting in a semiconductor device comprising power MOSFETs. Additionally manufacturing tolerances of metal wire processing may limit how close the source and drain areas can be and still be electrically connected. However, other devices use even more layers. This results in respective necessary additional process steps which therefore are a significant cost contributor and reduce silicon area efficiency when manufacturing power MOSFETs.